Low power design of nanometer FPGAs: architecture and EDA / by Hassan H

1.FPGA Architectures --
2.Power Consumption in Nanometer FPGAs --
3.Power Modeling and Estimation Techniques in FPGAs --
4.Dynamic Power Reduction --
5.Leakage Power Reduction --
6.Low-Power FPGA Design in Future CMOS Technologies.

Field Programmable Gate Arrays (FPGAs) have become very popular as embedded components on computing platforms. An FPGA is a viable, reprogrammable design approach that provides a fast time-to-market alternative to Application Specific Integrated Circuits (ASICs). Since FPGA implementations can be customized to fit for any application, their versatility leads to performance gains, and enables reuse of expensive silicon. Although high performance can be achieved in FPGAs, their high levels of power consumption pose a critical design challenge. This book will be an invaluable reference for researchers and practicing engineers concerned with power-efficient, FPGA design. State-of-the-art power reduction techniques for FPGAs will be described and compared. These techniques will be applied at the circuit, architecture, and electronic design automation levels to describe both the dynamic and leakage power sources and enable strategies for codesign. Design perspective on low-power FPGAs ... low-power techniques presented at key FPGA design levels for circuits, architectures, and electronic design automation, form critical, "bridge" guidelines for codesign; Low-leakage design in FPGAs ... comprehensive review of leakage-tolerant techniques empowers designers to minimize power dissipation; FPGA power estimation techniques ... provides valuable tools for estimating power efficiency/savings of current, low-power FPGA design techniques.